Siemens S7-300/400PLC addressing mode - Database & Sql Blog Articles

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The direct addressing method of Siemens S7-300/400plc is the same as that of S7-200. The indirect addressing modes are "memory indirect addressing" and "register indirect addressing". Since the S7-300/400 has dedicated pointer registers AR1 and AR2, the method of indirect addressing to establish the "address pointer" and the representation of the instructions and the range of addressing are quite different from those of the S7-200 PLC. It is more convenient to use and the range of addressing is larger.
1. Memory indirect addressing
Compared with the S7-200 PLC, the memory indirect addressing mode of the S7-300/400 has two obvious differences in actual use:
1 In S7-300/400, indirect addressing does not require the process of establishing a pointer. It can be directly marked with a "[]" in front of the addressed object, indicating that the addressed object is indirect.
2 Indirect addressing can be used for binary bit addresses.
[Example 1] The input I22.2 is read in by the local variable LD10, and the AND operation is performed with IO.O. The result is output to QO.1 as follows:
LP#22.2 // binary bit data 22.2 is read into the accumulator;
TLD10 //Binary bit data 22.2 is transferred to the local variable LD1O:
AI[LDIO] //Read in the input point determined by LDIO;
AIO.O // "AND" with IO.O;
=QO,l //Result output to QO.1
The above instructions are equivalent to the instructions:
AI22.2
AIO.O
=QO.1
2. Register indirect addressing
Register indirect addressing of the S7-300/400 is an indirect addressing method using the pointer register for offset. The format is [AR1,m] or [AR2,m]. The memory address specified by indirect addressing is the pointer register. The content of AR1 or AR2 and the sum of m.
The pointer register AR1 or AR2 is a double word length register, which can store information such as address, byte, bit, etc., so that addressing can be performed not only in the area of ​​the memory itself (such as between the internal flags M and between the inputs I). And can be carried out in different areas (such as from internal mark M to input I, etc.).
The meanings of the registers are as follows:

Address bit (bit31): The "0" pointer register does not contain an address character, and the address bits bit24 to bit26 should be 0:
The "1" pointer register contains an address character, and the address character is specified by bit 24 to bit 26.
Address character (bit24 to bit26): When the address bit (bit31) is "1", it is used to specify the memory address. The address is encoded as follows:
000: Address P:
001: address I;
010: address Q;
011: address M;
100: address DBX;
101: address DIX;
111: Address L.
Byte number (bit 18 to bit 3): Specifies the byte address of the memory, ranging from 0 to 65535.
Bit number (bit2 to bit0): Specify the bit address of the memory in the range of 0 to 7.
The pointer register can be free of address characters. In this case, the pointer register only needs to write binary bytes and bit data, and the address is specified by the logical operation instruction.
[Example 2] After shifting the binary bit 22.2 by the pointer register, I32.3 is read in and ANDed with IO.O. The result is output to QO.1 as follows:
LP#22.2 ∥ binary bit data 22.2 read into accumulator 1:
LARI // The contents of accumulator l are read into pointer register AR1:
AI[ARl, P#10.1] // Add the binary bit data 10.1 to the pointer register ARI content for indirect addressing:
AIO.O // AND with IO.O:
QO. 1 // The result is output to QO.1;
The above instructions are equivalent to the instructions:
AI32.3
AIO.O
=QO.1
When using binary bit data, note that the unit of the binary input/output is byte. Therefore, the offset of the pointer register should be calculated using the octal number.
[Example 3] After shifting the binary bit data 10.5 by the pointer register, I21.4 is read in and ANDed with IO.O. The result is output to QO.1 as follows:
LP#10.5, / Read binary bit data 10.5 into accumulator 1:
LARI / / the contents of the accumulator l is written to the pointer register AR1;
AI[ARI, P#10.7] // Add binary bit data 10.7 to the contents of the pointer register ARI for indirect addressing;
AIO.O “ is ANDed with IO.O;
=QO.I //The result is output to QO.1:
The above instructions are equivalent to the instructions:
AI21.4
AIO.O
=QO.l
The pointer register can contain an address character. In this case, the pointer register needs to write the address, the binary byte and the bit data at the same time, and the logical operation instruction no longer needs to specify the address.
[Example 4] Using M6.0 as an address pointer, the program for writing the contents of input IW10 to MW56 is as follows:
LP#M6.0 //Read the address data M6.0 into the accumulator l; '
L AR1 ∥ write the contents of the accumulator l into the pointer register ARI;
L IWIO //Read the contents of IWIO into accumulator 1:
TW[ARI,P#50.0] /Write the contents of accumulator 1 to MW56 (destination address uses indirect addressing mode)
Since this example belongs to the internal addressing of the memory area and the pointer register already contains the address M, the logical operation instruction no longer needs to specify the address. The above instructions are equivalent to the instructions:
LIW10
TMW56